It would not be hard to imagine
solar market is huge. The open question is if this wafer area is part of the SEMI figures. It seems like they
would have mentioned this effect if it was happening but, other than that, & instinct, it is difficult to state conclusively SEMI is or is not counting solar wafers.
(If that is even the correct term.)
Since it would seem to be in SEMI's interest to trumpet any new source of demand, the lack of such news makes it hard
to imagine solar power demand is already included in their reports. Inquiries to SEMI for clarification have
not been answered.
The 300mm vs 200mm argument is a red herring
for several reasons:
1) Area is area. A chip buyer
mostly doesn't care if it was built on 300mm or 200mm. If it has the same specs and
fits in the same package, the price is not dependent on its ancestry.
Admittedly, a savvy buyer might try
to extract price concessions if they know a part was built on 300mm since
these fabs are supposed to be more efficient. In our direct experience,
that very same buyer will later argue 200mm-built chips must be discounted because the fab equipment is already
depreciated and so the seller has lower costs. ;=)
Sorry, back to the point at hand:
2) 300mm fabs tend to run more-advanced
process geometries than 200mm operations. Obviously, a 300mm wafer built using
a 65nm process puts out more die per mm^2 wafer area than a 200mm
(or whatever) fab building on .90nm or larger processes. (We
tried to normalize for this impact in an earlier piece by adding
1% or 2% more die per mm^2 wafer area per quarter starting maybe ~2Q04 but omitted such a step in the latest missive.)
(Editor's note: Even without adjusting for more die per wafer due to tighter process geometries, y-o-y wafer area was
+22.4% while SIA sales were only up +9.3%.)
In other words, 300mm fabs make the
"problem" of wafer area shipped expanding faster than IC sales "worse," not "better." Truly "knowledgeable people" would understand this HELPS our
argument.
3) Unlike the "old days" when a new fab
often literally "replaced" an old one, older 200mm wafer capacity is not going
into mothballs or being sold off for scrap. Instead, the gear is being shipped to China where cheap money hopes to use it to carve out a niche.
There is a good possibility SEMI is missing some of these and therefore under reporting
wafer area shipped.
4) A related issue is last quarter's ICs
sold were not necessarily built with last quarter's wafers. Wafer area shipped probably lags SIA-recorded IC sales by ~90 days. Despite the productivity "miracle" of the semiconductor
business, it still takes the same 10 -13 weeks to process a wafer through a fab that it took 25 years
ago. It then takes another several weeks to probe, scribe and break, assemble,
package, mark, test and ship finished IC's to customers. Add another
30 days to account for payment terms before some firms can record an actual "sale."
(Often longer then 30 days in today's environment of heavyweight
customers demanding, and getting, extended terms.)
(Editor's note: Going back and using 1Q06 wafers to track 2Q06 IC sales, the "problem" is made
"worse." 2Q06 wafer area growth was still +22.4% y-o-y but 1Q06 IC sales growth was only +7.2%. Could
the differential be accelerating?)
5) Keep in mind SIA admits to tracking only ~85% of the IC market. It would be no surprise to learn
SEMI misses a similar percentage of wafer area shipped. It would also not be surprising to learn SEMI and SIA miss
more sales/shipments as the business grows inside China with non-western firms.
In other
words, on top of the above time lag between wafer area and IC
sales in 4), the published wafer area shipments (and
IC sales) numbers may under-report the differential and under-report
it a bit more each quarter. ( Details on SEMI's wafer area methodology are not clear but, on the equipment side, they use anonymously-reported
numbers sent to a 3rd party accountant.)
Thanks for asking the questions! This will probably become another missive.
(Maybe it already is?)
Feel free to point out flaws in the above?